* source IXDD_HEMANT *$ .SUBCKT IXDD414 VCC IN EN GND VCC OUT OUT1 GND ROUT1 OUT OUT1 1m Q_Q5 N209276 N03676 0 BC107A C_C5 N02728 0 1uF R_R25 N242307 EN 10K R_R9 N02728 0 10k C_C3 VEE 0 100uF R_R24 0 TP 10K R_R26 0 N242307 724 M_Q2 N04428 N209276 0 0 MNMOS R_R18 N01509 0 10k X_U4 VCC VEE 0 LM7805C X_U6A N336660 N336660 N295639 VEE 0 74ACT08 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R12 OUT 0 10k R_R17 N82692 0 10k R_R34 GND 0 0.0001 R_R16 IN N82692 100 M_Q1 N04213 N209203 0 0 MNMOS C_C6 VSS 0 47uf M_Q3 N104168 N04428 VCC VCC MPFET R_R1 VCC N04213 10K R_R70 0 TEST 1k X_U22A N295262 N295262 TEST VEE 0 74ACT00 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R15 N161018 0 10k R_R38 N260557 VCC 10k X_U9A N02728 N01509 N03600 VEE 0 74ACT00 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 X_U2A N260557 N260557 N259753 VSS 0 74ACT08 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R2 VCC N04428 10K C_C2 0 VCC 0.1uF D_D6 0 N02728 BZ-056 C_C4 VCC 0 100uF R_R39 0 N260557 2k R_R3 N02959 N03030 5 C_C7 N02959 N03030 1nf R_R35 0 VT 10k D_D1 N82834 VCC D1N4376 D_D5 0 VSS BZ-056 X_U10A N01509 N161018 N02959 VEE 0 74ACT02 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R19 0 N295262 10k R_R22 VCC N209276 5.0K R_R5 N03600 N03676 5 C_C8 N03600 N03676 1nf R_R6 N03676 0 10k R_R13 HENABLE N02728 100 D_D3 N02182 VCC D1N4376 R_R7 N03600 0 10k X_U5A TP N336660 VEE 0 74ACT04 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 X_U1A N242307 VT VSS 0 74ACT14 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R23 VCC N209203 5.0K R_R10 N02728 0 10k X_U7A N82692 TP VEE 0 74ACT04 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R33 GND 0 0.0001 R_R27 0 N336660 10k X_U3A VT N259753 HENABLE VSS 0 74ACT08 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R37 0 TP 10k Q_Q6 N209203 N03030 0 BC107A R_R21 TEST N01509 0.0001 R_R31 VCC VSS 100 R_R4 N03030 0 10k R_R36 0 N259753 10k D_D2 0 N82834 D1N4376 M_Q4 N104168 N04213 0 0 MNFET R_R11 N104168 OUT 0.01 R_R29 HENABLE N242974 10 R_R28 0 N295639 10k X_U8A N02728 N161018 VEE 0 74ACT04 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 D_D4 0 N02182 D1N4376 R_R8 N02959 0 10k C_C1 VCC 0 220uF X_U23A N295639 N295639 N295262 VEE 0 74ACT00 PARAMS: + IO_LEVEL=0 MNTYMXDLY=0 R_R30 0 N242974 100k .MODEL MNMOS NMOS +LEVEL=3 +W=4E-6 +L=2E-6 + NSS = 0.00000E+00 VTO = 6.30000E-01 TOX = 1.90000E-08 + XJ = 1.66632E-07 LD = 0.04000E-06 RSH = 6.40359E+02 + NSUB = 1.82429E+16 NFS = 1.26963E+11 UO = 5.95254E+02 + VMAX = 1.86907E+05 DELTA = 8.22502E-01 THETA = 5.77858E-02 + ETA = 2.19310E-02 KAPPA = 2.60564E-01 + CGSO = 7.263E-11 CGDO = 7.263E-11 CGBO = 1.11890E-10 + CJ = 2.59E-04 CJSW = 2E-10 PB = 0.811 *+ MJ = 0.36 MJSW = 0.31 TPG = 1 *+ DW =-0.18000E-06 DL =-0.72500E-06 *+ XQC = 1 .MODEL MPFET PMOS(LEVEL=3 W=4e-3 L=0.01e-006) .MODEL MNFET NMOS(LEVEL=3 W=4E-3 L=0.01e-006) .MODEL BC107A NPN .MODEL BZ-056 D RS=1.000E-3 CJO=1.000E-12 M=.3333 VJ=.75 ISR=7.539E-6 BV=5.009 + IBV=43.11E-3 TT=144.3E-9 .MODEL D1N4376 D .ENDS *$ .param RGOUT 10 .param CGOUT 200p .subckt 74ACT00 in1 in2 out vcc v00 B1 out1 v00 V=if( ((V(in1,v00)>1.4)&(V(in2,v00)>1.4)), 0, V(vcc,v00) ) R1 out1 out {RGOUT} C1 out v00 {CGOUT} .ends 74ACT00 .subckt 74ACT02 in1 in2 out vcc v00 B1 out1 v00 V=if( ((V(in1,v00)>1.4)|(V(in2,v00)>1.4)), 0, V(vcc,v00) ) R1 out1 out {RGOUT} C1 out v00 {CGOUT} .ends 74ACT02 .subckt 74ACT04 in1 out vcc v00 B1 out1 v00 V=if( (V(in1,v00)>1.4), 0, V(vcc,v00) ) R1 out1 out {RGOUT} C1 out v00 {CGOUT} .ends 74ACT04 .subckt 74ACT08 in1 in2 out vcc v00 B1 out1 v00 V=if( ((V(in1,v00)>1.4)&(V(in2,v00)>1.4)), V(vcc,v00), 0 ) R1 out1 out {RGOUT} C1 out v00 {CGOUT} .ends 74ACT08 .subckt 74ACT14 in1 out vcc v00 B1 out1 v00 V=if( (V(in1,v00)>1.4), 0, V(vcc,v00) ) R1 out1 out {RGOUT} C1 out v00 {CGOUT} .ends 74ACT14 * Model with hysteresis .subckt 74ACT14x in1 out vcc v00 E1 e1 v00 in1 v00 1 R1 e1 1 1k R2 v00 1 2k R3 1 2 4k C3 2 v00 1p R4 2 3 1k B1 3 v00 V=LIMIT(0, IF( (V(1,v00)>1), (100*(V(1,v00)-1)), 0 ), V(vcc,v00) ) G2 v00 out1 3 v00 -1 RG2 out1 vcc 1 R1 out1 out {RGOUT} C1 out v00 {CGOUT} .ends 74ACT14 .subckt LM7805C in out v00 B1 out1 v00 V=LIMIT(0, if( (V(in,v00)>7), 5, (V(in,v00)-2)), 5) R1 out1 out .1 .ends LM7805C